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IntroductionIf we want to send a digital (we'll assume that this, in turn means ``binary'') signal across a wire, the simplest way to do it is to have a ground reference and some other DC voltage (5 V is good...) and we'll call one ``0'' (being denoted by ground) and the other ``1'' (5 V). If we then know WHEN to look at the electrical signal on the wire (this timing can be determined by a clock...), we can know whether we're receiving a 0 or 1. This system would work - in fact it does, but it has some inherent problems which would prevent us from using it as a method of transmitting digital audio signals around the real world. Back in the early 1980's a committee was formed by the Audio Engineering Society to decide on a standard protocol for transmitting digital audio. For the most part, they got it right... They decided at the outset that they wanted a system that had some specific characteristics and, consequently some resulting implications : The protocol should use the cables, connectors and jackfields already existing in the recording studios. In addition, it should withstand transmission through existing analog equipment. The implications of this second specification are:
The result was the AES/EBU protocol (also known as IEC-958 Type 1). It's a bi-phase mark coding protocol which fulfills all of the above requirements. ``What's a bi-phase mark coding protocol?'' I hear you cry... Well what that means is that, rather than using two discrete voltages to denote 1 and 0, the distinction is made by voltage transitions. In order to transmit a single bit down a wire, the AES/EBU system carves it into two ``cells.'' If the cells are the same voltage, then the bit is a 0 : if the cells are different voltages, then the bit is a 1. In other words, if there is a transition between the cells, the bit is a 1. If there is no transition, the bit is a 0. This is illustrated in Figure 8.38.
The peak-peak level of this signal is between 2 V and 7 V. The source impedance is 150 Note that there is no need for a 0 V reference in this system. The AES/EBU receiver only looks at whether there is a transition between the cells - it doesn't care what the voltage is - only whether it's changed. The only thing we've left out is the ``self-clocking'' part. This is accomplished by a circuit known as a Phase-Locked Loop (or PLL to its friends...). This circuit creates a clock using an oscillator which derives its frequency from the transistion rate of the voltage it receives. The AES/EBU signal is sent into the PLL which begins in a ``capture'' mode. This is a wide-angle view where the circuit tries to get a basic idea of what the frequency of the incoming signal is. Once that's accomplished, it moves into ``pull-in'' mode where it locks on the frequency and stays there. This PLL then becomes the clock which is used by the receiving device's internal things (like buffers and ADC's).
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